ADS1115 Example Design with Zynq

Hello everyone, today we are going to talk about ADS1115 communication with Zynq system development environment. Firstly, in the big picture, we will implement the i2c communication for communicate with ADS1115. Then, we send the data to the Zynq PS section. The reason behind this is because in the Zynq PS section, the data is manage easily than the PL section. Moreover, the benefit from this design is the data is send to the PL section which is FPGA, therefore we can do some parallel processing here. But in this article, we just receive the data from ADS1115 in PL section and send it to PS section. The result data will be show through UART. The way that we send the data from PL to PS is using AXI DMA which is provide by Xilinx. The system architecture is shown below.

We implement this system and test in zybo board. So, firstly, we do the this system through Vivado. The Vivado block design is shown below.

Moreover, the i2c core is written in VHDL and it is modified from digikey.com. Then, we write the AXI interface for config the ADS1115 and we write the AXI-stream for send the data to AXI DMA. The source code about is this system is upload to https://github.com/ChanonTonmai/ADS1115-VHDL-with-AXI-DMA.

Thank you for reading.